Features:

   Bullet 1 - Click image to download. Uses DATAC chip

   Bullet 1 - Click image to download. Direct access to XPP & RPP

   Bullet 1 - Click image to download. Block & Independent Modes

   Bullet 1 - Click image to download. Multiple Dual Data Buffers

   Bullet 1 - Click image to download. High Resolution System Timer

   Bullet 1 - Click image to download. Cyclic Redundancy Checking (CRC)

   Bullet 1 - Click image to download. Full Bus Monitoring                                   Bullet 1 - Click image to download. Multiple XPP

   Bullet 1 - Click image to download. External Timer Clock input                       Bullet 1 - Click image to download. Fault Insertion and Detection

 

 
     
Description:

The Sy629VME-BP-E is a daughter module fit to the Sy629VME-BP-M card and provides a convenient means for monitoring ARINC 629 bus traffic whilst providing extensive error detection & identification capability. All features of the Sy629VME-BP-M card are retained when the daughter module is fitted. The daughter module also provides the ability to insert a comprehensive range of transmit faults, while transmitting and receiving data in accordance with programme data written into the XPP and RPP personality memory.

The Fault Insertion and Detection facility provides enhanced error insertion and identification capability together with the ability to insert user defined errors into the ARINC-629 bus. The errors are inserted by writing pairs of words to the Error Insert FIFO. The first word defines the type of error and the second word defines where the error should be inserted, by reference to the XPP defined transmit  schedule. Errors can be inserted at the word or string level.

   Bullet 1 - Click image to download. Fault Insertion and Detection:

   Bullet 1 - Click image to download. Gap

   Bullet 1 - Click image to download. MID SYNC Transition

   Bullet 1 - Click image to download. Bi-Phase

   Bullet 1 - Click image to download. Parity

   Bullet 1 - Click image to download. High/Low Bit Count

Data describing detected receive errors is automatically placed in the Error Detection FIFO where it can be accessed by the user software.

 

 

Specification:

 

Power Requirements (maximum)

+   5V at 2.5 A
+ 15V at 400 mA
-  15V at 400 mA

Address Selection

Addressable on 128k boundaries

VME Interface

A24, A32, D16

Connector Type

DIN 41612, P1-96 pin, P2-96 pin

Input/Output Connector

Outer rows of P2 and Front Panel D-Type connectors.

Operating Temperature

0° C to + 70° C

Storage Temperature

- 25° C to + 85° C

Relative Humidity

 0 to 95% (non condensing)

 

 

Ordering Information and Variants:

 Sy629VME-BP-E :

 ARINC-629 to VMEbus interface. Basic Protocol (BP), Error Insert & Detect Module

 Sy629VME-BP-M :

 ARINC-629 to VMEbus interface. Transmitter & Full Bus Monitor under Basic Protocol (BP)

 Sy629VME-BP-M-CC :

 ARINC-629 to VMEbus interface. Transmitter & Full Bus Monitor under BP. Conduction Cooled

 Sy629VME-BP-T :

 ARINC-629 to VMEbus interface. Basic Protocol (BP), Multi-Terminal Emulation

 Sy629VME-CP-M :

 ARINC-629 to VMEbus interface. BP/CP Protocol, Transmitter & Full Bus Monitor

 Sy629VME/VSB-MCE :

ARINC-629 to VME/VSBbus interface. BP/CP Protocol, uses MCE chip set

 Sy629VME/VSB-E :

ARINC-629 to VME/VSBbus interface. BP/CP Protocol, uses MCE chip set. Error Insertion & Detection Module

 Request more information

 

BACK to Sycos Home Page

 

Contact Details:

 
 

Sycos AES
Hambledon Manor, Iwerne Minster, Blandford Forum, Dorset, England. DT11 8QS
Tel:   +44 (0) 1747 812 486
Fax: +44 (0) 1747 812 486
SYCOS Copyright © 2006

 
 

 

 If you have any comments on our web-page design, please E-mail us at webmaster@sycos.co.uk.