Error Insert/Detect Features:

   Bullet 1 - Click image to download. Transmit Frequency Control

   Bullet 1 - Click image to download. Delay of Bus Quiet Signal (BUSQ)

   Bullet 1 - Click image to download. Generation of Babble

   Bullet 1 - Click image to download. Generation of Bus Clash

   Bullet 1 - Click image to download. Error Detection at the bit level

 

    Error Insert Capabilities Include:

   Bullet 1 - Click image to download. Gap Error (3-bit)

   Bullet 1 - Click image to download. Gap Error (5-bit)

   Bullet 1 - Click image to download. Sync Error (short)

   Bullet 1 - Click image to download. Sync Error (long)

   Bullet 1 - Click image to download. Parity Error

   Bullet 1 - Click image to download. Bi-Phase Error

   Bullet 1 - Click image to download. Bit-Count Error (-1)

   Bullet 1 - Click image to download. Bit-Count Error (+1)

 
Description:

The Sy629PC-MCE-E is a daughter module fit to the Sy629PC-MCE card and provides a convenient means for monitoring ARINC-629 bus traffic, whilst providing extensive error detection & identification capability. The daughter module also provides the ability to insert a comprehensive range of transmit faults, while transmitting and receiving data in accordance with programme data written into the XPP and RPP personality memory.

 

 

Ordering Information and Variants:

 Sy629PC-MCE-E :

 Error Insertion & Detection Module. BP/CP Protocol, uses MCE chip set.

 Sy629PC-MCE :

 ARINC-629 to PC-ATbus interface. BP/CP Protocol, uses MCE chip set

 Sy629PC-BP-M :

 ARINC-629 to PC-ATbus interface. Transmitter & Full Bus Monitor under Basic Protocol (BP)

 Sy629PC-BP-E :

Error Insertion & Detection Module. Basic Protocol (BP)

 Sy629PC-BP-T :

 ARINC-629 to PC-ATbus interface, Basic Protocol (BP), Multi-Terminal Emulation

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Contact Details:

 
 

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Tel:   +44 (0) 1747 812 486
Fax: +44 (0) 1747 812 486
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