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Home > ARINC 629 Products > PMC Products > Conduction Cooled Transmitter & Bus Monitor

Data Sheet

ARINC 629 Conduction Cooled PMC Basic Protocol Tx and Bus Monitor Product

Sales Ref: Sy629ccPMC-BPM






Features


- Interface compatible with 32bit PCI Local bus   Specification, revision 2.1, June 1995

- PCI interrupts on  Module Events

- Single width ccPMC Module  

- Uses Boeing approved DATAC device

- Direct access to XPP and RPP from PCI

- Block & Independent Modes

- Choice of:

         - Dual Data Buffers or  

         - Cyclic Data Buffers

 - High Resolution System Timer

- Auto Cyclic Redundancy Checking (CRC)

- Auto Refresh Counter Support

- Bus Monitoring

- Transmit Monitoring

- Error Status Reporting

- Rx Time-Stamping

- External Timer Clock input

- FIFO buffers for Rx data and Time-Stamp

- Time-Stamp resolution 0.5μS

The Sy629ccPMC-BPM is a Conduction Cooled card that provides a convenient means for transmitting and receiving data over an ARINC 629 bus in accordance with the transmit and receive programme defined by data written into the XPP and RPP memory.

 

The use of the recognised DATAC chip ensures full compliance with ARINC 629 specification with Basic Protocol (BP).

 

ARINC-629 Input/Output is via a connector on the PMC module faceplate. Two further connectors on the faceplate provide Arinc-629 Pseudo-Bus connection and external power for the ARINC-629 SIM and stub cable.

 

The module provides configuration registers which allow the host to:

 

- Automatically identify the module and its revision status.

- Identify connector cables connected to the module.

- Assign address space for the module’s data buffer memory and registers. (Plug-in and Play).

- Control and monitor the PCI bus interface to the module.

- Read module interrupt configuration as assigned by the POST software as it initialises and configures the system.

 

Additional features designed into the module are:

 

- 16 Independent Cyclic-Data-Buffers, each with a capacity for 4k x 32-bit words.

- Direct access to the Cyclic-Data-Buffer Read / Write Pointers.

- High resolution time-stamping of received data.

- PCI interrupts on Module Events.

- Direct access to Module registers and application memory.

- Interface compatible with 32bit PCI Local bus Specification, revision 2.1, June 1995.